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coursera-comp-arch
magnet:?xt=urn:btih:53bae6d22f3b6e692673f9335e0a0198c1618426&dn=coursera-comp-arch
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Hash值:
53bae6d22f3b6e692673f9335e0a0198c1618426
点击数:
115
文件大小:
5.17 GB
文件数量:
108
创建日期:
2019-1-1 13:21
最后访问:
2024-6-11 12:01
访问标签:
coursera-comp-arch
文件列表详情
lectures/01-Introduction/Computer Architecture 0.0 L00-S1Course Introduction.mp4 99.41 MB
lectures/02-Instruction-Set-Architecture-Microcode/Computer Architecture 1.0 L1S1 Course Overview (434).mp4 18.16 MB
lectures/02-Instruction-Set-Architecture-Microcode/Computer Architecture 1.1 L1S2 Motivation (1640).mp4 95.04 MB
lectures/02-Instruction-Set-Architecture-Microcode/Computer Architecture 1.2 L1S3 Course Content (910).mp4 25.75 MB
lectures/02-Instruction-Set-Architecture-Microcode/Computer Architecture 1.3 L1S4 Architecture and Microarchitecture (2337).mp4 52.83 MB
lectures/02-Instruction-Set-Architecture-Microcode/Computer Architecture 1.4 L1S5 Machine Models (1602).mp4 32.83 MB
lectures/02-Instruction-Set-Architecture-Microcode/Computer Architecture 1.5 L1S6 ISA Characteristics (2547).mp4 58.02 MB
lectures/02-Instruction-Set-Architecture-Microcode/Computer Architecture 1.6 L1S7 Recap (0117).mp4 1.92 MB
lectures/03-Pipelining-Review/Computer Architecture 2.0 L2S1 Microcoded Microarchitecture (1408).mp4 81.87 MB
lectures/03-Pipelining-Review/Computer Architecture 2.1 L2S2 Pipeline Basics (3051).mp4 64.69 MB
lectures/03-Pipelining-Review/Computer Architecture 2.2 L2S3 Structural Hazard (1013).mp4 23.16 MB
lectures/03-Pipelining-Review/Computer Architecture 2.3 L2S4 Data Hazards (4633).mp4 92.93 MB
lectures/04-Cache-Review/Computer Architecture 3.0 L3S1 Control Hazards Jumps (1556).mp4 26.94 MB
lectures/04-Cache-Review/Computer Architecture 3.1 L3S2 Control Hazards Branch (2402).mp4 47.51 MB
lectures/04-Cache-Review/Computer Architecture 3.2 L3S3 Control Hazards Others(751).mp4 15.59 MB
lectures/04-Cache-Review/Computer Architecture 3.3 L3S4 Memory Technologies (2247).mp4 50.5 MB
lectures/04-Cache-Review/Computer Architecture 3.4 L3S5 Motivation for Caches (2225).mp4 127.36 MB
lectures/05-Superscalar1/Computer Architecture 4.0 L4S1 Classifying Caches (2807).mp4 159.71 MB
lectures/05-Superscalar1/Computer Architecture 4.1 L4S2 Cache Performance (1711).mp4 31.28 MB
lectures/05-Superscalar1/Computer Architecture 4.2 L4S3 Superscalar 1 (642).mp4 13.47 MB
lectures/05-Superscalar1/Computer Architecture 4.3 L4S4 Basic Two-way In-order Superscalar (456).mp4 9.48 MB
lectures/05-Superscalar1/Computer Architecture 4.4 L4S5 Fetch Logic and Alignment (1101).mp4 19.12 MB
lectures/06-Superscalar3-and-Exceptions/Computer Architecture 5.0 L5S1 Baseline Superscalar and Alignment (416).mp4 8.49 MB
lectures/06-Superscalar3-and-Exceptions/Computer Architecture 5.1 L5S2 Interrupts and Bypassing (1213).mp4 23.66 MB
lectures/06-Superscalar3-and-Exceptions/Computer Architecture 5.2 L5S3 Interrupts and Exceptions (2925).mp4 57.23 MB
lectures/06-Superscalar3-and-Exceptions/Computer Architecture 5.3 L5S4 Introduction to Out-of-Order Processors (3053).mp4 61.92 MB
lectures/07-Superscalar3/Computer Architecture 6.0 L6S1 Review of Out-of-Order Processors (326).mp4 6.86 MB
lectures/07-Superscalar3/Computer Architecture 6.1 L6S2 I2O2 Processors (1958).mp4 38.79 MB
lectures/07-Superscalar3/Computer Architecture 6.2 L6S3 I2O1 Processors (2844).mp4 161.88 MB
lectures/07-Superscalar3/Computer Architecture 6.3 L6S4 IO3 Processors (1623).mp4 32.01 MB
lectures/07-Superscalar3/Computer Architecture 6.4 L6S5 IO2I Processors (431).mp4 8.07 MB
lectures/08-Superscalar4/Computer Architecture 7.0 L7S1 Speculation and Branch (1437).mp4 29.08 MB
lectures/08-Superscalar4/Computer Architecture 7.1 L7S2 Register Renaming Introduction (1108).mp4 63.3 MB
lectures/08-Superscalar4/Computer Architecture 7.2 L7S3 Register Renaming with Pointers to IQ and ROB (2454).mp4 141.77 MB
lectures/08-Superscalar4/Computer Architecture 7.3 L7S4 Register Renaming with Values in IQ and ROB (1214).mp4 67.58 MB
lectures/08-Superscalar4/Computer Architecture 7.4 L7S5 Memory Disambiguation (949).mp4 55.91 MB
lectures/09-VLIW1/Computer Architecture 8.0 L8S1 Limits of Out-of-Order Design Complexity (1313).mp4 25.64 MB
lectures/09-VLIW1/Computer Architecture 8.1 L8S2 Introduction to VLIW (2157).mp4 42.25 MB
lectures/09-VLIW1/Computer Architecture 8.2 L8S3 VLIW Compiler Optimizations (2120).mp4 40.04 MB
lectures/09-VLIW1/Computer Architecture 8.3 L8S4 Classic VLIW Challenges (818).mp4 15.54 MB
lectures/09-VLIW1/Computer Architecture 8.4 L8S5 Introduction to Predication (951).mp4 19.29 MB
lectures/10-VLIW2/Computer Architecture 9.0 L9S1 Scheduling Model Review (558).mp4 20.03 MB
lectures/10-VLIW2/Computer Architecture 9.1 L9S2 Review of Predication (3048).mp4 73.24 MB
lectures/10-VLIW2/Computer Architecture 9.2 L9S3 Predication Implementation (1006).mp4 23.85 MB
lectures/10-VLIW2/Computer Architecture 9.3 L9S4 Speculation Execution (2602).mp4 49.14 MB
lectures/10-VLIW2/Computer Architecture 9.4 L9S5 Dynamic Events and Clustered VLIWs (1042).mp4 23.22 MB
lectures/10-VLIW2/Computer Architecture 9.5 L9S6 Case Study IA-64Itanium (2110).mp4 49.11 MB
lectures/11-Branch-Prediction/Computer Architecture 10.0 L10S1 Branch Cost Motivation (637).mp4 12.05 MB
lectures/11-Branch-Prediction/Computer Architecture 10.1 L10S2 Branch Prediction Introduction (518).mp4 9.36 MB
lectures/11-Branch-Prediction/Computer Architecture 10.2 L10S3 Static Outcome Prediction (1605).mp4 29.34 MB
lectures/11-Branch-Prediction/Computer Architecture 10.3 L10S4 Dynamic Outcome Prediction (2912).mp4 165.22 MB
lectures/11-Branch-Prediction/Computer Architecture 10.4 L10S5 Target Address Prediction (1845).mp4 35.72 MB
lectures/12-Advanced-Caches-1/Computer Architecture 11.0 L11S1 Basic Cache Optimizations (1608).mp4 34.49 MB
lectures/12-Advanced-Caches-1/Computer Architecture 11.1 L11S2 Cache Pipelining (1416).mp4 28.37 MB
lectures/12-Advanced-Caches-1/Computer Architecture 11.2 L11S3 Write Buffers (952).mp4 21.52 MB
lectures/12-Advanced-Caches-1/Computer Architecture 11.3 L11S4 Multilevel Caches (1737).mp4 52.78 MB
lectures/12-Advanced-Caches-1/Computer Architecture 11.4 L11S5 Victim Caches (604).mp4 58.5 MB
lectures/12-Advanced-Caches-1/Computer Architecture 11.5 L11S6 Prefetching (1234).mp4 148.87 MB
lectures/13-Advanced-Caches-2/Computer Architecture 12.0 L12S1 Multiporting and Banking (2008).mp4 48.59 MB
lectures/13-Advanced-Caches-2/Computer Architecture 12.1 L12S2 Software Memory Optimizations (1653).mp4 70.87 MB
lectures/13-Advanced-Caches-2/Computer Architecture 12.2 L12S3 Non-blocking Caches (1929).mp4 42.11 MB
lectures/13-Advanced-Caches-2/Computer Architecture 12.3 L12S4 Critical Word First and Early Restart (306).mp4 7.03 MB
lectures/14-Memory-Protection/Computer Architecture 13.0 L13S1 Memory Management Introduction (1304).mp4 32.06 MB
lectures/14-Memory-Protection/Computer Architecture 13.1 L13S2 Base and Bound Registers (1144).mp4 26.02 MB
lectures/14-Memory-Protection/Computer Architecture 13.2 L13S3 Page Based Memory Systems (2704).mp4 154.8 MB
lectures/14-Memory-Protection/Computer Architecture 13.3 L13S4 Translation and Protection (1437).mp4 33.57 MB
lectures/14-Memory-Protection/Computer Architecture 13.4 L13S5 TLB Processing (1200).mp4 26.04 MB
lectures/15-Vector-Processors-and-GPUs/Computer Architecture 14.0 L14S1 Address Translation Review (936).mp4 22.7 MB
lectures/15-Vector-Processors-and-GPUs/Computer Architecture 14.1 L14S2 Cache and Memory Protection Interaction (2218).mp4 54.93 MB
lectures/15-Vector-Processors-and-GPUs/Computer Architecture 14.2 L14S3 Vector Processor Introduction (1804).mp4 44.55 MB
lectures/15-Vector-Processors-and-GPUs/Computer Architecture 14.3 L14S4 Vector Parallelism (644).mp4 13.84 MB
lectures/15-Vector-Processors-and-GPUs/Computer Architecture 14.4 L14S5 Vector Hardware Optimizations (1852).mp4 41.76 MB
lectures/15-Vector-Processors-and-GPUs/Computer Architecture 14.5 L14S6 Vector Software and Compiler Optimizations (554).mp4 11.84 MB
lectures/16-Multithreading/Computer Architecture 15.0 L15S1 Reduction ScatterGather and the Cray 1 (920).mp4 23.46 MB
lectures/16-Multithreading/Computer Architecture 15.1 L15S2 SIMD (658).mp4 15.43 MB
lectures/16-Multithreading/Computer Architecture 15.2 L15S3 GPUs (2002).mp4 45.16 MB
lectures/16-Multithreading/Computer Architecture 15.3 L15S4 Multithreading Motivation (733).mp4 16.19 MB
lectures/16-Multithreading/Computer Architecture 15.4 L15S5 Course-Grain Multithreading (2616).mp4 59.85 MB
lectures/16-Multithreading/Computer Architecture 15.5 L15S6 Simultaneous Multithreading (1253).mp4 30.39 MB
lectures/17-Parallel-Programming-1/Computer Architecture 16.0 L16S1 SMT Implementation (1719).mp4 99.34 MB
lectures/17-Parallel-Programming-1/Computer Architecture 16.1 L16S2 Introduction to Parallelism (1759).mp4 101.56 MB
lectures/17-Parallel-Programming-1/Computer Architecture 16.2 L16S3 Sequential Consistency (2100).mp4 119.03 MB
lectures/17-Parallel-Programming-1/Computer Architecture 16.3 L16S4 Introduction to Locks (0339).mp4 21.35 MB
lectures/18-Parallel-Programming-2/Computer Architecture 17.0 L17S1 Sequential Consistency Review (348).mp4 8.52 MB
lectures/18-Parallel-Programming-2/Computer Architecture 17.1 L17S2 Locks and Semaphores (1001).mp4 18.9 MB
lectures/18-Parallel-Programming-2/Computer Architecture 17.2 L17S3 Atomic Operations (2711).mp4 51.27 MB
lectures/18-Parallel-Programming-2/Computer Architecture 17.3 L17S4 Memory Fences (1111).mp4 22.67 MB
lectures/18-Parallel-Programming-2/Computer Architecture 17.4 L17S5 Dekker's Algorithm (1413).mp4 28.64 MB
lectures/19-Small-Multiprocessors/Computer Architecture 18.0 L18S1 Locking Review (204).mp4 11.94 MB
lectures/19-Small-Multiprocessors/Computer Architecture 18.1 L18S2 Bus Implementation (1211).mp4 69.27 MB
lectures/19-Small-Multiprocessors/Computer Architecture 18.2 L18S3 Cache Coherence (1704).mp4 97.59 MB
lectures/19-Small-Multiprocessors/Computer Architecture 18.3 L18S4 Bus-Based Multiprocessors (516).mp4 30.12 MB
lectures/19-Small-Multiprocessors/Computer Architecture 18.4 L18S5 Cache Coherence Protocols (4900).mp4 249.89 MB
lectures/20-Multiprocessor-Interconnect-1/Computer Architecture 19.0 L19S1 More Cache Coherence Protocols (2116).mp4 119.58 MB
lectures/20-Multiprocessor-Interconnect-1/Computer Architecture 19.1 L19S2 Introduction to Interconnection Networks (829).mp4 15.04 MB
lectures/20-Multiprocessor-Interconnect-1/Computer Architecture 19.2 L19S3 Message Passing (2659).mp4 135.62 MB
lectures/20-Multiprocessor-Interconnect-1/Computer Architecture 19.3 L19S4 Interconnect Design (1506).mp4 29.01 MB
lectures/21-Multiprocessor-Interconnect-2/Computer Architecture 20.0 L20S1 Networking Review (756).mp4 19.02 MB
lectures/21-Multiprocessor-Interconnect-2/Computer Architecture 20.1 L20S2 Topology (1853).mp4 39.92 MB
lectures/21-Multiprocessor-Interconnect-2/Computer Architecture 20.2 L20S3 Topology Parameters (1425).mp4 33.79 MB
lectures/21-Multiprocessor-Interconnect-2/Computer Architecture 20.3 L20S4 Network Performance (1535).mp4 31.75 MB
lectures/21-Multiprocessor-Interconnect-2/Computer Architecture 20.4 L20S5 Routing and Flow Control (2027).mp4 48.01 MB
lectures/22-Large-Multiprocessors/Computer Architecture 21.0 L21S1 Credit Based Flow Control (723).mp4 14.15 MB
lectures/22-Large-Multiprocessors/Computer Architecture 21.1 L21S2 Deadlock (1009).mp4 18.85 MB
lectures/22-Large-Multiprocessors/Computer Architecture 21.2 L21S3 False Sharing (929).mp4 14.88 MB
lectures/22-Large-Multiprocessors/Computer Architecture 21.3 L21S4 Introduction to Directory Coherence (1255).mp4 22.5 MB
lectures/22-Large-Multiprocessors/Computer Architecture 21.4 L21S5 Implementation (2902).mp4 57.06 MB
lectures/22-Large-Multiprocessors/Computer Architecture 21.5 L21S6 Scalability of Directory Coherence (1331).mp4 62.75 MB
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